Product Roadmap Update
Nvidia Corp has revived its Rubin CPX chip program, which market observers had believed to be cancelled. Industry analyst Ming‑Chi Kuo of TF International Securities announced on X that production of the revised CPX is scheduled to begin in the first quarter of 2027.
Technical Specifications
The updated CPX GPU is limited to a maximum power draw of 2,300 watts and is equipped with 168 GB of HBM4 memory, compared with the 288 GB HBM4 used in the Rubin GPU and the 128 GB GDDR7 memory of the earlier CPX version. The design now employs a dedicated MGX ETL rack rather than sharing rack space with the Rubin system.
Configurations and Module Architecture
Customers may order CPX systems in configurations of 64, 128, 192 or 256 GPUs. A 64‑GPU module consists of eight compute trays, each housing eight GPUs, plus a single switch tray. Eight CPX GPUs within a tray are linked via NVLink, delivering between 1 and 1.5 TB per second of bandwidth per CPX GPU, versus 3.6 TB/s for each Rubin GPU. Inter‑tray communication uses Spectrum‑6 Ethernet with copper links, while cross‑module links employ OSFP optical connections.
System Integration and Workload Role
Nvidia requires the CPX to operate alongside the Vera Rubin NVL72 accelerator in a 1:1 ratio. The CPX handles pre‑fill operations and constructs the key‑value (KV) cache, which is then transferred to the Rubin accelerator over Ethernet RDMA for decode processing. Kuo noted that more than 50 % of current AI inference workloads involve context processing and KV‑cache building. Each eight‑GPU CPX tray contains approximately 1.34 TB of HBM4 memory.
This article was generated with the support of AI and reviewed by an editor.